1. Field of the Invention
The present invention relates to an image processing apparatus and method for inputting a plurality of rectangular images and converting the images to dot sequential raster image data.
2. Description of the Related Art
Consider a case where image data in page units composed of a plurality of rectangular images is output upon being converted to raster image data in line units using a buffer memory for image data. In this case, it is necessary that image data in page units input in units of rectangular images be converted to image data in line units. The most common method of performing this conversion involves making the conversion by a double-buffer scheme using a buffer memory whose capacity is double the amount of data equivalent to the following: (number of lines of image data contained in the rectangular image)×(number of pixels of one line).
Another method involves making the conversion from a rectangular image to raster image data by a single-buffer scheme using a buffer memory having a capacity equivalent to the following: (number of lines of image data contained in the rectangular image)×(number of pixels of one line). With this method, processing is executed in such a manner that after one line of image data has been read out of the buffer memory, the next rectangular image is written to the address from which data was read out (see the specifications of Japanese Patent Application Laid-Open Nos. 2004-40381 and 2001-285644).
Processing for converting rectangular images to image data in line units by the double-buffer scheme will now be described as a first example of the prior art.
Assume that a rectangular image comprises four lines of image data contained in the rectangular image and four pixels on each line. In such case the rectangular image will be composed of image data consisting of 4×4 pixels, for a total of 16 pixels.
FIGS. 2A and 2B are diagrams illustrating rectangular images, in which FIG. 2A illustrates a rectangular image that is input to a buffer memory initially and FIG. 2B the rectangular image that is input to the buffer memory next.
The order in which the pixel data is input to the buffer memory is as indicated by the numerical order in the diagrams. That is, when one line of pixel data in one rectangular image has been input, the next line of pixel data is input. Specifically, in the example of FIG. 2A, when pixel data of pixels 1 to 4 of the first line has been input, pixel data of pixels 5 to 8 of the second line is input next. When 16 pixels have been input to the buffer memory in this manner, the input of the rectangular image shown FIG. 2A is completed. When the rectangular image illustrated in FIG. 2B is input, pixel data of pixels 17 to 32 is input in a similar order. It should be noted that although only two rectangular images are shown in FIGS. 2A and 2B, pixel data of pixels 33 to 48 of a third rectangular image would similarly be placed in the order of the pixels of the rectangular images shown in FIGS. 2A and 2b. The same would hold true with regard to rectangular images from the fourth onward.
FIG. 3 is a block diagram illustrating the configuration of a memory circuit according to the double-buffer scheme.
Reference numerals 420 and 430 denote line buffer memories each having a capacity equal to the following: (number of lines of image data contained in the rectangular image)×[number of pixels (x) of one line]. These pertain to FIGS. 2A and 2B. A memory controller 410 controls writing of rectangular images to the line buffer memories 420, 430 and reading of image data from these line buffer memories. If x=32 holds, eight rectangular images corresponding to 32 pixels contained in one line of image data in page units are expressed as an array of rectangular images. The total number of pixels that can be stored in a line buffer memory in this case is 32×8=256. In this case, if image data of 256 pixels (equivalent to eight rectangular images) is written to the line buffer memory 420, a write controller changes over to the line buffer memory 430 and the rectangular image that is input next is stored in the line buffer memory 430. On the other hand, a read controller operates so as to read image data line by line out of the line buffer memory 420 in which writing by the write controller has been completed.
FIG. 4 is a diagram useful in describing the order in which image data is written to the line buffer memories by the write controller, and FIG. 5 is a diagram useful in describing the order in which image data is read out of the line buffer memories by the read controller. Thus, when image data is written, the image data is written to the line buffer memories in units of rectangular images; when image data is read out, the image data is read out line by line. However, in the case of such a double-buffer scheme, two 4-line buffer memories in each of which one line is composed of 32 pixels are required. The greater the size of a rectangular image, the larger the required capacity of the line buffer memory. This leads to a rise in cost.
Next, processing for converting rectangular images to image data in line units using a single buffer (e.g., only line buffer memory 420) will be described as a second example of the prior art.
The order in which the image data of the initial array of rectangular images is written is the same as in FIG. 4. The order of read-out of the image data of this initial array of rectangular images is as illustrated in FIG. 5. However, here a single buffer is used. When image data has been read out of this line buffer memory line by line, therefore, the address at which the rectangular image input next is stored is different.
FIG. 6 is a diagram illustrating the state that results when, after one line of image data has been read out of the line buffer memory, two rectangular images that were input next are stored at the addresses from which the image data was read out.
Here pixels 1 to 16 and pixels 17 to 32 of two rectangular images (shown in FIGS. 2A and 2B) have been stored on line 600. Similarly, after the completion of read-out of the initial array of rectangular images following completion of read out of the image data of each main scan, image data of pixels 33 to 64, pixels 65 to 96, pixels 97 to 128 is stored on lines 601, 602, 603, respectively.
FIG. 7 is a diagram useful in describing read-out of image data of a second array of rectangular images. At read-out of the first line of image data, pixels 1 to 4 of the first rectangular image, pixels 17 to 20 of the second rectangular image, pixels 33 to 36 of the third rectangular image are read out, this continuing in similar fashion up to pixels 113 to 116 of the eighth rectangular image. The order in which pixels are read out is as indicated by the dashed lines. Addressing and read-out are performed in similar fashion in relation to the second line of image data, i.e., pixels 5 to 8 and pixels 21 to 24.
FIG. 8 is a diagram illustrating the manner in which pixels of rectangular images input next at positions of pixels read out in the order shown in FIG. 7 are written. FIG. 8 illustrates the state that results when, at read-out of image data of the second array of rectangular images, the initial and second rectangular images (FIGS. 2A and 2B) of the third array of rectangular images are input and stored.
FIG. 9 is a diagram illustrating the state that results when, after the third array of rectangular images has thus been stored in the line buffer memory, read-out of the image data of one main scan begins and the initial rectangular image (FIG. 2A) of the fourth array of rectangular images input next attendant upon read-out of the data is stored at the position of the image data that was read out.
Although the details will not be described, at read-out of image data of the fifth array of rectangular images, i.e., at writing of the image data of the sixth array of rectangular images, an addressing method similar to that used when writing the image data of the first array of rectangular images is adopted.
Thus, this method is such that even among small images of 4 pixels×4 lines and 32 pixels in the main scan direction, six addressing operations are required. Accordingly, in a case where the size of rectangular images to undergo conversion processing is large and image size actually used is taken into account, addressing control in data write and read becomes more complicated.
Thus, with the prior art described above, processing for converting from rectangular images to raster image data is complicated. That is, with the former of the two methods, a memory capacity that is twice the number of sub-scan-lines is required. In order to achieve high-speed operation, therefore, a memory of very large memory capacity is incorporated in the integrated circuit.
As described above, the latter of the two methods requires processing in which a rectangular image is written to addresses from which image data has been read, and the written image data is read out in the main-scan direction. The processing becomes more complicated whenever the number of rectangular images increases. In particular, if it is attempted to implement such addressing methods by hardware alone, verification of operation takes time. Further, there is a greater risk that bugs will occur since it is possible that all addressing methods will be realized by hardware without undergoing verification.